Paper Name      
A Survey on effective Automatic Test Pattern Generator of Self-Checking Scan-BIST VLSI Circuits
Published Date
2016 MAY
Journal 
International Research Journal of Engineering and Technology
Volume 
3
Issue
5
Pages
645 - 648
Publisher
IRJET









Authors 
G. Naveen Balaji
S. Chenthur Pandiyan
D. Rajesh



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Web Link
Hacker’s ID
https://hackerone.com/rajesh23
Researcher ID
http://www.researcherid.com/rid/C-1968-2016
Google Scholar
https://www.scholar.google.com/citations?hl=en&user=4zecM3kAAAAJ 


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